In Figures 1 and 2 of my November 2015 post I demonstrated how (for a fixed P_{D}) the T_{j} of an LFPAK56 MOSFET under steady-state conditions depends to a large extent on the area of PCB copper to which the device is soldered. This was shown in simulation and verified by real-life experiment. The results from that earlier post are reproduced in Figure 1 below, for your convenience.

*Figure 1 Simulated T _{j} v P_{D} for an LFPAK56 device on various PCBs*

In Figure 1, the vertical axis is device junction temperature T_{j}. However, for a fixed power dissipation we could also redraw Figure 1 as a graph of junction-to-ambient thermal resistance (“R_{thj-a}”) against PCB area. I’ve done this with the points highlighted in Figure 1, and I’ve also added an extra board size of 1600mm^{2} so that we have a curve composed of four points (Figure 2). Remember that

and T_{amb} in this case is 20°C.

*Figure 2 R _{thj-a} v PCB copper area for an LFPAK56 device*

We can visualize R_{thj-a} as being the single lumped thermal resistance which represents the combination of all the possible thermal pathways from the device die (junction) to ambient, as shown in Figure 3

*Figure 3 R _{thj-a} represents the combination of all the possible thermal pathways from the device die to ambient*

As we saw in an earlier post, for a surface-mount device using its own PCB as a heatsink, the majority of the die heat energy travels downwards into the PCB and then to ambient from the surface of the PCB. This is what I have tried to show in Figure 3. I also have shown the equivalent thermal resistance R_{thj-a} representing the aggregate of these paths. R_{thj-a} is shown as a variable resistor because its value in any situation will depend on many factors – not the least of which being PCB copper area, as we have just seen in Figure 2.

Let’s assume now that we’d like to add some more heatsinking to our MOSFET. Is there another way in which we could assist the die thermal energy in its passage towards ambient? Would it help, for instance, if we put a heatsink on top of our device? If we know the thermal resistance through the top of the device (R_{thj-c}), and the thermal resistance of the heatsink (R_{HS}) could we combine these numbers with the R_{thj-a} numbers in Figure 2 to give us an improved thermal network as shown in Figure 4?

*Figure 4 Adding a heatsink to the top of the LFPAK56 device, and its new thermal network.*

Well it so happens that our helpful MOSFET supplier has given us a figure for R_{thj-c} of 34K/W, and the manufacturer of a small finned 12 x 12mm heatsink is quoting an R_{HS} figure of 25K/W. We also have the R_{thj-a} figures for several sizes of PCB copper in Figure 2, so that’s everything we need, isn’t it? Can we now estimate a new overall thermal resistance curve for the system of Figure 4 using simple series/parallel combinations of resistors? And how would that compare to the original curve of Figure 2?

Interestingly, the answer turns out to be… Oh. Oh dear. I appear to have run out of space again. So, on that cliffhanger I’ll leave you for this month. If you’d like to have a go at estimating the new thermal resistance curve for the MOSFET plus heatsink, please feel free – I promise I have given you all the information you need!

With over 20 years experience as an applications engineer specialised in power MOSFETs, Chris has dealt with a multitude of power semiconductor design-in challenges. One of the recurring themes in these challenges has been ‘thermal’, and therefore he has spent much of his working life immersed in questions of a thermal nature. He has authored numerous conference papers, magazine articles and application notes on a variety of power semiconductor topics. In his free time he likes nothing better than plodding through muddy fields in the North of England.

February 11, 2020

January 7, 2020